Deskripsi Pekerjaan
Join A*STAR's Institute of Microelectronics (IME) as a Scientist in Heterogeneous Integration and pioneer the next generation of semiconductor technologies. You will lead groundbreaking research in chip-to-wafer and wafer-to-wafer hybrid bonding processes, enabling unprecedented levels of device integration and performance. This role offers the opportunity to work at the forefront of microelectronics innovation, developing advanced interconnect solutions that push the boundaries of Moore's Law.
Your work will directly contribute to Singapore's semiconductor ecosystem by creating scalable integration methodologies for heterogeneous systems. Collaborate with multidisciplinary teams to solve complex engineering challenges in materials science, process optimization, and device characterization. You'll have access to world-class facilities and resources to translate theoretical concepts into practical applications that impact industries from AI to healthcare.
A*STAR provides a dynamic research environment where scientific curiosity meets industrial relevance. Your contributions will be published in leading journals and potentially protected through patents, establishing you as a thought leader in semiconductor integration technology.
Tanggung Jawab
- Lead R&D initiatives in advanced chip-to-wafer and wafer-to-wafer hybrid bonding processes
- Design and execute experiments for heterogeneous integration process optimization
- Develop novel interconnect technologies for 3D integrated circuits
- Collaborate with cross-functional teams on materials characterization and process integration
- Document research outcomes through technical reports, patents, and publications
- Mentor junior researchers and support technology transfer initiatives
- Stay current with emerging semiconductor packaging standards and methodologies
Kualifikasi
- PhD or Master's degree in Materials Science, Electrical Engineering, or related field
- 3+ years experience in semiconductor fabrication or heterogeneous integration
- Expertise in hybrid bonding, thermo-compression bonding, or wafer-level packaging
- Proficiency with characterization tools (SEM, TEM, AFM, XPS)
- Strong background in semiconductor process development and DOE methodologies
- Publication record in peer-reviewed journals or conference proceedings
- Demonstrated ability to work in multidisciplinary research environments